15. Code - PICC
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The system consists of a master controller (GUI) and Programmable Slave Controllers (PSG)
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The GUI is written in Visual C and runs on a PC
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The GUI initiates all commands
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The code in all PICs is CCS labs PICC
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[S5] C language header files for 229 Microchip µCs
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Each PSC contains one of two Microchip PIC µCs
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Each PSC responds to a unique software address
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The GUI continually polls each PSC for status every 100ms
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Each PSC responds to a status request with a status report
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All commands from the GUI take place within the 100ms slot
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The GUI initiates LIBS
The LHC optical bench is 4 feet x 2 feet. A commercially viable design would ordinarily employ a single large processor with noise reduction techniques to interface all I/O across the bench, resulting in a huge birds nest of wiring. Since the project was never intended for commercial use, the hardware design takes the unusual step of incorporating a distributed processor system using a differential style
RS485 [D9] bus running duplex to avoid the need for clash detection hardware or software. The Tx signal is always present and when not communicating it is set high to permit remote energy scavenging.
All µCs are Microchip PICs, of which two types are used:
Device Pkg I/O ROM RAM EEP Tn TX SPI ADC CMP IOC CCP IN ICP Comment
16F690-I/P DIP20 18 4k 256 256 012 1 1 12 2 A6B4 1 RA3 Y 20MHz General use
18F4455-I/P DIP40 35 24k 2048 256 0123 1 1 13 2 E4 2 RE3 Y 48MHz Master/PDA
Key:
Tn = number of onboard timers, TX = number of basic serial comms interfaces,
SPI = Serial Peripheral Interface, ADC = number of Analogue to Digital Converter channels,
CMP = number of analogue comparators, IOC = chip pins offering open collector/drain drivers,
CCP = number of digital comparators, IN = separate interrupt input chip pin,
ICP = In-Circuit Programming feature, (alpha numeric char pair e.g. A6 = PIC chip port pin)
USB INTERFACE
My initial choice of the 18F4455 was driven by its inclusion of full USB 2.0 hardware support but subsequent investigation revealed the USB interface to be too complex and resource hungry. Since the chips were already purchased they were kept and instead, a standard UART implemented with a simple customised packet structure.
PIC µC DATASHEETS
PIC OSCILLATOR
All PICs run from an external 18.432MHz, 50ppm CMOS oscillator, which gives zero errors for UART baud rates up to 115200. The 18F4455 PICs have an internal PLL oscillator which derives an internal clock of 43.24MHz from the 18.432 oscillator.
PIC CODE
All PICs contain the same code build with optional compilation switches.
PIC COMMS
All communication originates from the PC-based GUI written in VC++, via the PC serial port using a standard USB 2.0 cable. The address 0 PSC (PIC slave Controller) which is an 18F4455, converts this to full duplex RS485 and relays it to all other PSCs. These are mostly 16F690 but where more resources are needed, 18F4455 too.
Each PIC responds only to a particular address in the serial communications protocol from the GUI and can only transmit on the shared Tx bus after receiving and acknowledging its dedicated command. Clashes are neither supported or allowed.
PICs are addressed according to function as shown in the table below.
ADDRESSES
ADDR Type PIC NP Function PIC CLOCK
0 PSC 18F4455 10 USB 0 Trig 1 PCM 2 PDA 3 TC08 18.432MHz->PLL ~43MHz
1 PSC 16F690 01 MK580 Controller 18.432MHz
2 PSC 16F690 02 Ruby Controller 18.432MHz
3 PSC 18F4455 20 Front Panel Controller 18.432MHz->PLL ~43MHz
4 PSC 16F690 03 2HG motor & FB pot & Heater & Temp 18.432MHz
5 PSC 16F690 04 2HG pol motor & FB encoder 18.432MHz
6 PSC 16F690 05 4HG motor & FB pot & Heater & Temp 18.432MHz
7 PSC 16F690 06 4HG pol motor & FB encoder 18.432MHz
8 PSC 16F690 07 4 Fans & Flows witch & Level 18.432MHz
9 PSC 16F4455 30 Target Focus Rot Mot Detect Press 18.432MHz->PLL ~43MHz
A PSC 16F690 08 PCM401 shutter controller 18.432MHz (OPTIONAL)
B PSC 16F690 09 Bremsstrahlung Radiation Detect 18.432MHz (OPTIONAL)
C PSC 18F4455 40 GPIB Controller 18.432MHz->PLL ~43MHz (OPTIONAL)
D PSC Spare
E PSC Spare
F ALL - 00 General Broadcast
'NP' is not a field, but instead a count of how many of each type of PIC is used:
4 x 18F4455
9 x 16F690
PROTOCOL
The PIC address is part of the command protocol packet definition below:
|BB HH ADDR|RE CMD | CsumH | CsumL | Byte 1 |- - - - | Byte n |
|76 54 3210|76 543210|76543210|76543210|76543210|- - - - |76543210|
|nn nn nnnn|nn nnnnnn|nnnnnnnn|nnnnnnnn|nnnnnnnn|- - - - |nnnnnnnn|
| | | | | | | |
| 1st byte |2nd |3rd |4th |5th |6th |nth |
Where:
1. BB = #bytes:
00 = 0 data bytes ( 2 bytes total)
01 = 2 data bytes ( 6 bytes total)
10 = 4 data bytes ( 8 bytes total)
11 = FUTURE ENHANCEMENT
2. HH = hardware selection bits
3. ADDR = 14 PSC base addresses (+2 reserved)
4. R = 1 = Read, 0 = write
5. E = Expansion bit (command) (normally 0)
6. CMD = Command (64)
7. Csum = Checksum of entire command, a 16-bit value stored in CsumH, CsumL
This structure is partly designed to aid debugging by ensuring both the PSC address and instruction command are readily discernible in first two bytes of the serial data stream.
The number of bytes BB is in the first byte to initialise the Rx byte counter.
A maximum of 15 PSCs is addressable, with optional sub-division of hardware function provided by the E bit which also doubles up as an extra ms address bit. The R bit determines if the command is read or write; a zero byte command is by default neither read nor write.
The two remaining 4-bit addresses are for:
00 PMC
15 General broadcast to all PSCs
A maximum of 64 commands is immediately obvious, with optional expansion to 128 variants using the E command extension bit that is normally 0. Each of these can be a Read or Write command as defined by the R bit. Commands that do not act on data and do not read or write are identified by setting the BB #bytes bits to 00.
The GUI is the bus master and initiates all commands.
Each PSC responds to GUI commands,
PSC address 0 has hardware that converts PC RS232 (via USB) from the PC to RS485 duplex
PSC address 0 has hardware that converts RS485 responses from PSCs to RS232 back to the PC via USB.
PSC CODING
Working away from my lab and its instruments, I used a second Microchip PICkit 2 in Logic Analyser mode and Serial Protocol mode to check out the digital and serial comms.
ADD SCREENSHOTS OF MICROCHIP PICKIT LA & COMMS HERE
Interfaces
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